Static semiconductor memory device

Details Static semiconductor memory device Static semiconductor memory device

1985-05-23

1987-10-20

Popek, Joseph A.

Static information storage and retrieval

Addressing

365203, G11C 800

Patent

active

047018895

ABSTRACT:
A static semiconductor memory device includes a memory cell matrix having word and digit lines connected to memory cells, an X address decoder connected to the word lines, a gate circuit connected to the digit lines, a Y address decoder connected to a gate of the gate circuit, a sense amplifier connected to an output of the gate circuit, a latching circuit connected to an output of the sense amplifier, and an internal control circuit for supplying control signals to the above components. The internal control circuit controls so as to activate the X address decoder and the sense amplifier, precharge the latching circuit, supply a select signal representing an updated address to the selected word and digit lines, cause the latching circuit to latch a signal appearing across the digit line, and deactivate the X address decoder and the sense amplifier.

REFERENCES:
patent: 4272832 (1981-06-01), Ito
patent: 4338679 (1982-07-01), O'Toole
patent: 4355377 (1982-10-01), Sud et al.
patent: 4360903 (1982-11-01), Plachno et al.
Japanese Utility Model Laid-open Specification No. 58-114596, May 8, 1983.

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