Boots – shoes – and leggings
Patent
1985-10-04
1987-10-20
Eng, David Y.
Boots, shoes, and leggings
G06F 922
Patent
active
047018429
ABSTRACT:
In a pipelined instruction execution system including a microstore for storing sequences of microinstruction addresses associated with each macroinstruction, a nanostore for randomly storing unique microinstructions, and an execution unit for executing the microinstructions, a no-op/prefetch apparatus, according to the present invention, prevents a microinstruction address, stored in the microstore, from accessing the nanostore and forces a no-op address into the nanostore when the execution unit executes a conditional microbranch instruction. A no-op microinstruction, corresponding to the no-op address, is retrieved from the nanostore and is executed in the execution unit. During the execution of the no-op microinstruction in the execution unit, the no-op/prefetch apparatus permits either the next sequential microinstruction address following the conditional microbranch instruction to access the nanostore or another non-sequential microinstruction address to access the nanostore, the selection of the next sequential microinstruction address or said another non-sequential microinstruction depending upon the outcome of the execution of the conditional microbranch instruction by the execution unit. As a result, when the microstore and the nanostore are utilized, only one cycle of delay, for resolution of the pipeline, will be encountered following the execution of the conditional branch microinstruction by the execution unit. Furthermore, additional real estate is available on the integrated circuit chip on which the instruction execution system is disposed.
REFERENCES:
patent: 4099229 (1978-07-01), Kancler
patent: 4128873 (1978-12-01), Lamiaux
patent: 4373180 (1983-02-01), Linde
patent: 4390946 (1983-06-01), Lane
patent: 4415969 (1983-11-01), Bayliss et al.
patent: 4507732 (1985-03-01), Catiller et al.
Bouchard John H.
Eng David Y.
International Business Machines - Corporation
LandOfFree
Method and apparatus for avoiding excessive delay in a pipelined does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Method and apparatus for avoiding excessive delay in a pipelined, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method and apparatus for avoiding excessive delay in a pipelined will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-1616034