Method for producing a three-dimensional type semiconductor devi

Details Method for producing a three-dimensional type semiconductor devi Method for producing a three-dimensional type semiconductor devi

1989-06-23

1990-02-20

Hearn, Brian E.

Fishing, trapping, and vermin destroying

437 56, 437194, 437915, 437200, 437192, 148DIG164, 357 237, 357 41, 357 71, H01L 2700

Patent

active

049026372

ABSTRACT:
A method for producing a three-dimensional type semiconductor device comprises a first semiconductor integrated circuit layer comprising active regions, insulating layers, gate electrodes, and interconnection layers; an insulating layer formed thereon; and a second semiconductor integrated circuit layer comprising active regions, insulating layers, gate electrodes and interconnection layers. Active regions in the second layer are directly coupled to an interconnection layer, and active region and a gate electrode in the first layer, which are located immediately thereunder, by interlayer interconnections through a contact hole formed straight, so that a distance of each interlayer interconnection can be reduced.

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H. Shichijo et al., IEDM, Session 9.1, 1984, pp. 228-231, "Polysilicon Transistors in VLSI MOS Memories".

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