Fishing – trapping – and vermin destroying
Patent
1988-07-18
1990-02-20
Hearn, Brian E.
Fishing, trapping, and vermin destroying
437 41, 437 56, 437 58, 148DIG82, 357 42, 357 44, H01L 2100, H01L 2102, H01L 21265, H01L 2978
Patent
active
049026348
ABSTRACT:
A process for manufacturing CMOS devices is described, wherein two separate masks are used for the production of the gate regions of the two complementary transistors of the CMOS device, each of said masks allowing the formation of the gate region of only one of the two complementary transistors and being also used for the implantation of ions adapted to form the source and drain regions of said transistor. Accordingly only two masking steps are sufficient for the production of the gate, drain and source regions of the CMOS devices, with a reduction of the costs related to the production of integrated circuits executed in CMOS technology.
REFERENCES:
Weste, N., "Principles of CMOS VLSI Design-A Systems Perspective," pp. 76, 84, 89, 107, chapter 3, Addison-Wesley.
Wolf, S., Silicon Processing for the VLSI Era, vol. 1, Lattice Press, 1986.
Everhart B.
Hearn Brian E.
Josif Albert
Modiano Guido
SGS-Thomson Microelectronics S.p.A.
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