Chip on board package with top and bottom terminals

Details Chip on board package with top and bottom terminals Chip on board package with top and bottom terminals

1994-06-06

1998-10-27

Saadat, Mahshid D.

Active solid-state devices (e.g., transistors, solid-state diode

Housing or package

With contact or lead

257698, 257668, 257690, 257700, 361792, 174 524, H01L 2348, H01L 2304, H01L 23053, H05K 111

Patent

active

058281266

ABSTRACT:
An integrated circuit package of this invention includes a series of nonconductive rigid substrates, each substrate having a pattern of generally coplanar bond fingers embedded thereupon. An integrated circuit die is connected to individual bond fingers of varying bond finger patterns. Individual bond fingers are connected to package terminals by medial leads, which are generally perpendicular to the bond finger patterns. Semiconductor die packages having both top and bottom package terminals are thus produced. Methods and devices are shown.

REFERENCES:
patent: 4539622 (1985-09-01), Akasaki
patent: 5103292 (1992-04-01), Mahulikar
"Electronic Packaging and Interconnecti0on Handbook", pp. 6.35-6.36, C. Harper.

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