Semiconductor memory device using internal voltage obtained by b

Details Semiconductor memory device using internal voltage obtained by b Semiconductor memory device using internal voltage obtained by b

1996-09-06

1997-12-09

Nelms, David C.

Static information storage and retrieval

Addressing

Sync/clocking

365203, 36523006, G11C 800

Patent

active

056967314

ABSTRACT:
A main booster circuit generates an internal supply voltage obtained by boosting a supply voltage. A detector detects a skew in an address signal. An oscillator generates a pulse signal while the detector is detecting the skew in the address signal. An auxiliary booster circuit generates an internal supply voltage in accordance with the pulse signal from the oscillator. A row decoder selects one of a plurality of word lines in accordance with the address signal. A word line driver drives the word line selected by the row decoder, based on the internal supply voltages supplied from the main booster circuit and the auxiliary booster circuit.

REFERENCES:
patent: 4272832 (1981-06-01), Ito
patent: 5272042 (1993-12-01), Ichiguchi
patent: 5306963 (1994-04-01), Leak et al.
patent: 5335106 (1994-08-01), Kawamoto
patent: 5493538 (1996-02-01), Bergman

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