Power reducing circuit for synchronous semiconductor device

Details Power reducing circuit for synchronous semiconductor device Power reducing circuit for synchronous semiconductor device

1994-12-15

1997-12-09

Westin, Edward P.

Static information storage and retrieval

Powering

Conservation of power

326 62, G11C 700

Patent

active

056967292

ABSTRACT:
A power conserving circuit configuration is presented which reduces the power supplied to the input/output pins in the initial input circuit in a synchronous semiconductor device. The circuit reduces the power to the input/output pins in the initial input circuit during the standby mode and/or readout mode, and restores the power to the initial input circuit, when an input signal is entered in an external disabling pin which generates an output disabling signal, which makes the output signal from the input/output pin to be nullified and causes the power to be restored in the synchronous semiconductor device.

REFERENCES:
patent: 4686386 (1987-08-01), Tadeo
patent: 4718043 (1988-01-01), Akatsuka
patent: 4737666 (1988-04-01), Umedo
patent: 4801820 (1989-01-01), Nootbaar
patent: 4963769 (1990-10-01), Hiltpold et al.
patent: 5140557 (1992-08-01), Yoshida
patent: 5251178 (1993-10-01), Childers
patent: 5300831 (1994-04-01), Pham

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