Memory management system for checkpointed logic simulator with i

Details Memory management system for checkpointed logic simulator with i Memory management system for checkpointed logic simulator with i

1994-06-15

1997-02-18

Teska, Kevin J.

Boots, shoes, and leggings

395403, 395449, 36424341, G06F 1208

Patent

active

056048890

ABSTRACT:
A memory management system for use with a logic simulator 10 for storing data in each memory that is being simulated by the logic simulator 10. The system includes memory control logic 14 coupled to a physical memory 16 which is segmented into a permanent storage area P (26), a temporary storage area T1 (24) and a second temporary storage area T2 (22). Each write request from the simulator causes memory control logic 14 to store the latest request into the T2 area (22). Prior data stored in T2 (22) are first moved to the T1 (24) or P (26) storage area where other store requests for the same and other simulated locations were stored during the same simulator time interval. In this fashion, a history of simulator write activity is stored in physical memory 16 and available for rerunning or restarting the simulator 10 at or near a prior simulator cycle.

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