Dynamically operable two-phase logic circuits

Details Dynamically operable two-phase logic circuits Dynamically operable two-phase logic circuits

1983-05-04

1986-03-04

Miller, Stanley D.

Electrical pulse counters, pulse dividers, or shift registers: c

Pulse counting or dividing chains

Using bistable regenerative trigger circuits

307453, 307481, 307605, 377105, 377111, H03K 2344

Patent

active

045743860

ABSTRACT:
A dynamic two-phase circuit arrangement includes two dynamic switching circuits, each of which has an input stage, a non-inverting output stage and an inverting output stage. Two-phase control of the two dynamic switching circuits is effected by two drive pulses. The arrangement also includes combinatorial logic which is operated by the drive pulses to feed counter clock pulses to the first dynamic switching circuit. The first dynamic switching circuit performs a divide-by-two operation in response to the clock pulses and drives the second dynamic switching circuit from its Q-output. The second dynamic switching circuit includes an additional switching transistor which is also driven from the Q-output of the first dynamic switching circuit. This transistor is connected to perform an OR-function with the non-inverting output stage of the second dynamic switching circuit. As a result, this output stage produces shift pulses having half the repetition frequency of the clock pulses. The duration of these shift pulses corresponds to the period of the two-phase control cycle of the arrangement.

REFERENCES:
patent: 3621280 (1971-11-01), Ma
patent: 3965369 (1976-06-01), Hatsukano
patent: 3983411 (1976-09-01), Luscher et al.
patent: 4178520 (1979-12-01), Rusznyak
patent: 4356413 (1982-10-01), Rosenbluth et al.
patent: 4371795 (1983-02-01), Mulder et al.
patent: 4415819 (1983-11-01), Mathes
Riley, "Counter Circuit", IBM Tech Disc Bull, vol. 3, No. 10, Mar. 1961, pp. 51-52.

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