Neural network integrated circuit device having self-organizing

Details Neural network integrated circuit device having self-organizing Neural network integrated circuit device having self-organizing

1992-05-01

1994-03-08

MacDonald, Allen R.

G06F 700

Patent

active

052934578

ABSTRACT:
An extension directed integrated circuit device having a learning function on a Boltzmann model, includes a plurality of synapse representing units arrayed in a matrix, a plurality of neuron representing units, a plurality of educator signal control circuits, and a plurality of buffer circuits. Each synapse representing unit is connected to a pair of axon signal transfer lines and a pair of dendrite signal transfer lines. Each synapse representing unit includes a learning control circuit which derives synapse load change value data in accordance with predetermined learning rules in response to a first axon signal Si and a second axon signal Sj, a synapse load representing circuit which corrects a synapse load in response to the synapse load change valued data and holds the corrected synapse load value Wij, a first synapse coupling operating circuit which derives a current signal indicating a product Wij.multidot.Si from the synapse load Wij and the first axon signal Si and transfers the same to a first dendrite signal line, and a second product signal indicating a product Wij.multidot.Sj from the synapse load Wij and the second axon signal Sj and transfers the same onto a second dendrite signal line.

REFERENCES:
patent: 4906865 (1990-03-01), Holler
patent: 4926180 (1990-05-01), Anastassiou
patent: 4988891 (1991-01-01), Mashiko
patent: 5021988 (1991-06-01), Mashiko
"Electronic Implementation of Neuromorphic System", CICC, 1988, p. 10.1.3.
"Parallel Distributed Processing", Rumelhart, et al., MIT Press, 1988 (Chapter 7).
Alspector, J. and Allen, R. B. "A Neuromorphic VLSI Learning System", Advanced Research in VLSI, MIT Press, 1987, pp. 313-327.

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