Patent
1989-08-23
1990-08-28
Wojciechowicz, Edward J.
357 86, 357 89, H01L 2978
Patent
active
049529919
ABSTRACT:
A vertical MOSFET includes a base region formed on the surface of a drain region, a source region provided in the base region, a first semiconductor region provided on the surface of the drain region between portions of the base region, the first semiconductor region having the same conductivity type as the drain region and an impurity concentration higher than that of the drain region, a second semiconductor region of the opposite conductivity type provided in the first semiconductor region, a gate electrode provided on the base region surrounded by the source region and the first semiconductor region, and an insulating film provided on the second semiconductor region.
REFERENCES:
patent: 4593302 (1986-06-01), Lidow et al.
patent: 4884113 (1989-11-01), Muramoto
NEC Corporation
Wojciechowicz Edward J.
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