Bipolar logic circuit having two multi-emitter transistors with

Electrical transmission or interconnection systems – Nonlinear reactor systems – Parametrons

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307456, 307459, 307463, 307466, 307299A, 307299B, 307300, H03K 19013, H03K 19082

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046971025

ABSTRACT:
A logic circuit is provided which includes a first multi-emitter transistor with its emitters coupled to a group of first input lines and a first transistor with its base coupled to the collector of said first multi-emitter transistor. A second transistor is also provided with its base coupled to the collector of said first transistor, said second transistor having a polarity opposite to that of said first multi-emitter transistor. A second multi-emitter transistor is connected with its base coupled to the collector of said second transistor and with its emitters coupled to a group of second input lines, and a third transistor is connected with its base coupled to the collector of said second multi-emitter transistor and with its collector coupled to an output line. The collector of said first multi-emitter transistor is coupled to the emitter of said second multi-emitter transistor in order to absorb minority carriers stored in the transistors. This feature significantly improves the circuit operating speed. A further feature is the provision of a logic circuit which is highly integrated and which consumes reduced amounts of electric power, while maintaining high-speed performance of the TTL circuit, by substituting a multi-collector transistor that reversely operates for an inverter portion of the TTL circuit.

REFERENCES:
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patent: 3522444 (1970-08-01), Lourie
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patent: 3961351 (1976-06-01), Blatt
patent: 4471239 (1984-09-01), Ohba
patent: 4521700 (1985-06-01), Blumberg
patent: 4564773 (1986-01-01), Tanizawa et al.
patent: 4584490 (1986-04-01), West
"Sylvania Universal High-Level Logic", Sylvania (pub.) pp. 1-4; 2/5/1965.
Chang et al, "Constant-Current TTL Circuit"; IBM-TDB; vol. 19, No. 4, p. 1234; 9/1976.

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