Method of manufacturing semiconductor devices

Details Method of manufacturing semiconductor devices Method of manufacturing semiconductor devices

1990-11-16

1992-04-21

Hearn, Brian E.

Fishing, trapping, and vermin destroying

437 38, 437 24, 437 67, 437911, 148DIG88, H01L 21265

Patent

active

051067706

ABSTRACT:
In the fabrication of a junction field effect transistor, specifically a static induction transistor, an epitaxial layer of high resistivity N-type silicon is grown on a substrate of low resistivity N-type silicon. A plurality of elongated parallel grooves separated by interposed ridges are formed by reactive ion etching. A layer of silicon oxide is grown on all exposed surfaces including the side walls and bottoms of the grooves. Fluorine is ion implanted into the silicon oxide. The grooves are filled with deposited silicon oxide or polycrystalline silicon, and material is removed to form a flat planar surface with the silicon at the surfaces of the ridges exposed. P-type doping material is ion implanted into alternate (gate) ridges. The wafer is heated to diffuse the P-type doping material and form gate regions. Heating also activates the implanted fluorine ions which react with unbonded silicon atoms at the silicon oxide-silicon interface thus quenching vacant bond sites. N-type doping material is ion implanted in the top of the intervening (source) ridges. Metal contacts are applied to the gate ridges, source ridges, and the bottom of the substrate.

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Ohyu et al., "Improvement of SiO.sub.2 /Si Interface Properties Utilizing Fluorine Ion Implantation and Drive-In Diffusion", Japanese Journal of Applied Physics; vol. 28; No. 6; Jun. 1989; pp. 1041-1045.

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