Microprocessor bus interface protocol analyzer

Details Microprocessor bus interface protocol analyzer Microprocessor bus interface protocol analyzer

1991-10-04

1994-03-08

Canney, Vincent P.

Excavating

371 62, 395275, G06F 1100

Patent

active

052933849

ABSTRACT:
A high performance microprocessor has associated therewith, protocol monitoring apparatus for monitoring all of the commands issued by the microprocessor and detecting when the protocol was not completed properly or completed within certain preestablished periods of time. When the monitor/timing circuits detect a protocol error, the monitoring apparatus operates to generate an output control signal which unwedges the microprocessor enabling it to continue further processing. Additionally, the monitoring apparatus includes a register for storing the address and command that the microprocessor was executing at the time of the protocol error. The same register is also used to capture address and command information for any other type of error.

REFERENCES:
patent: 4956842 (1990-09-01), Said
patent: 5067071 (1991-11-01), Schanin et al.
patent: 5193181 (1993-03-01), Barlow et al.
European Search Report for corresponding EPO patent application 92 116896.9, transmitted in a communication dated Apr. 2, 1993.

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