Fabrication of Schottky barrier MOSFETS

Fishing – trapping – and vermin destroying

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437228, 437247, 437913, H01L 21441

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active

046960937

ABSTRACT:
A method for fabricating MOSFET devices by a one mask, one etch process utilizing vacuum deposited chromium, silicon upon which is grown SiO.sub.2 and an anneal process. An optional optimizing ion implantation and activating anneal step is also disclosed, as are two, and three, mask and etch procedures.

REFERENCES:
patent: 3617824 (1971-11-01), Shinoda et al.
patent: 4619038 (1986-10-01), Pintohovski
patent: 4638551 (1987-01-01), Einthoven
Lebedev et al., Soviet Physics-Semiconductors, vol. 4, No. 11, May (1971), pp. 1900-1902.
Martinez et al., Solid State Electronics, vol. 23, Pergamon Press, Ltd., Gt. Brit., pp. 55-64.
Yacobi et al., J. Appl. Phys., 51(12), Dec. 1980, pp. 6424 and 6425.

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