Variable length instruction decoding apparatus having cross coup

Details Variable length instruction decoding apparatus having cross coup Variable length instruction decoding apparatus having cross coup

1988-08-10

1989-12-26

Lee, Thomas C.

Boots, shoes, and leggings

3642318, 3642446, 3642628, 3642631, G06F 928

Patent

active

048902187

ABSTRACT:
A pipeline computer architecture having two interconnected microengines operating simultaneously in an instruction preparation unit of a pipeline computer system. Each microengine operates on the same portion or different portions of an instruction concurrently within the same clock cycle. To assure coordination, one microengine is declared the executive or attribute generator and the other the main microengine. The main microengine generates routines to control the instruction preparation unit hardware. The executive microengine prepares the next tank in parallel and supplies arguments to the main microengine as the main microengine generates its current routine. At the completion of a routine performed by the main microengine, it signals the executive microengine to obtain the next task and associated parameters.

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