FIFO Memory device

Details FIFO Memory device FIFO Memory device

1982-04-02

1984-07-10

Moffitt, James W.

Static information storage and retrieval

Plural shift register memory devices

365221, G11C 700

Patent

active

044596812

ABSTRACT:
A first-in-first-out memory device which is operable at a high-speed is disclosed. The memory device comprises a plural stages of memory units and a plural stages of control unit, each of the control units including a circuit for indicating whether its stage holds effective data or not, a circuit for receiving a signal of the indicating means of the previous stage, and a circuit generating a write signal when the memory cell holds no effective data and the previous stage hold effective data, in which the write signal is used to remove data stored in the previous memory cell to the corresponding stage memory cell.

REFERENCES:
patent: 3893088 (1975-07-01), Bell
patent: 4151609 (1979-04-01), Moss

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