Semiconductor memory device with error check and correcting func

Details Semiconductor memory device with error check and correcting func Semiconductor memory device with error check and correcting func

1988-10-04

1990-09-18

Atkinson, Charles E.

Excavating

371 51, G06F 1110

Patent

active

049583522

ABSTRACT:
An EEPROM having an ECC circuit further comprises a counter circuit. The ECC circuit checks and corrects bit errors included in data read out from a memory cell array. In addition, the ECC circuit generates a predetermined signal every time it corrects a bit error. The counter circuit counts a predetermined signal generated from the ECC circuit.

REFERENCES:
patent: 3814922 (1974-06-01), Nibby et al.
patent: 4053751 (1977-10-01), Ault
patent: 4584681 (1986-04-01), Singh et al.
patent: 4612640 (1986-09-01), Mehrotra et al.
patent: 4809276 (1989-02-01), Lemay et al.
H. Kawashima et al. "64K Bit EEPROM with on chip ECC", Technical Report of Institute of Electronics and Communication Engineering of Japan, vol. 86, No. 1 (1986), pp. 51-56.
D. Cioaca et al "A Million-Cycle CMOS 256K EEPROM" 1987 IEEE International Solid-State Circuits Conference, Digest of Technical Papers (Feb. 25, 1987), pp. 78, 79.

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