Simplified hardware implementation of a digital IF translator

Details Simplified hardware implementation of a digital IF translator Simplified hardware implementation of a digital IF translator

1984-06-01

1986-05-27

Safourek, Benedict V.

Pulse or digital communications

Repeaters

Testing

455323, 455333, 364725, 329 50, 375 77, H03D 900

Patent

active

045920745

ABSTRACT:
There is disclosed an implementation of a digital intermediate frequency (IF) translator which accepts a digital converted IF input and performs a complex mix to produce an IF baseband output in I (in-phase) and Q (quadrature phase) format. The translator reduces the sampling rate and provides filtering to produce I and Q components which can be subsequently utilized to derive the information contained in the original analog input signal. The translator is implemented with a configuration which simplifies the complex mix required to produce I and Q components and accumulates the samples to provide boxcar filtering prior to providing the I and Q components as outputs at a reduced sampling rate.

REFERENCES:
patent: 2965849 (1960-12-01), Matthews et al.
patent: 3384828 (1968-05-01), Pierre et al.
patent: 3634773 (1972-01-01), Kobayashi
patent: 3908114 (1975-09-01), White
patent: 4130806 (1978-12-01), Van Gerwen et al.
patent: 4393352 (1983-07-01), Volpe et al.

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