Chemistry: electrical and wave energy – Processes and products
Patent
1982-09-23
1984-07-10
Tufariello, Thomas
Chemistry: electrical and wave energy
Processes and products
C25D 1132
Patent
active
044591810
ABSTRACT:
A pattern is defined in a semiconductor wafer by forming one or more notches from a top major surface downwardly beyond the lowermost junction between opposite conductivity type regions, and by anodizing the wafer to provide a columnated porous region below and substantially confined to the lateral dimension of each notch. Anodization current flows substantially vertically, without significant lateral spreading. The porous regions are oxidized to afford well-defined vertically bordered insulative regions separating the lowermost junctions on opposite sides thereof.
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C. Hu, "A Parametric Study of Power MOSFETs", IEEE Electron Device Conference, Paper CH1461-3/79, 0000-0385.
IEEE Transactions Electron Devices, vol. ED-25, No. 10, Oct. 1978.
Ammar & Rogers, "UMOS Transistors on Silicon", Transactions IEEE, Ed-27, pp. 907-914, May 1980.
"Oxidized Porous Silicon Isolates Better Than Sapphire", Charles Cohen, Electronics, Jan. 27, 1981, pp. 77-78.
Eaton Corporation
Tufariello Thomas
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