Detecting overflow conditions for negative quotients in nonresto

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3647365, 364737, 364748, 3647505, 364761, 364DIG2, G06F 752

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active

056897219

ABSTRACT:
A method of detecting anomalous overflow conditions is used, in an exemplary embodiment, in implementing in a 486-type microprocessor, nonrestoring two's complement division for negative quotients using 2n bit dividends and n bit divisors. Each interative division step, an adder/subtractor is used to add/subtract the properly aligned divisor to/from the left shifted dividend, to produce a partial remainder and a carry out bit Cout. Complement Cout is assumed to be the same as the most significant bit of the partial remainder PR(MSB), such that PR(MSB) is used as the sign bit in further computations, with complement Cout being used to control quotient generation according to DVRS XOR Cout. The anomalous overflow test signals overflow when complement Cout is the different than the most significant bit of the first partial remainder PR1(MSB), such that the anomalous overflow test is implemented according to the logic equation: Cout XNOR PR1(MSB).

REFERENCES:
patent: 4992968 (1991-02-01), Adiletta
patent: 5010511 (1991-04-01), Hartley et al.
patent: 5097435 (1992-03-01), Takahashi
patent: 5272660 (1993-12-01), Rossbach

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