Parallel magnitude comparison using manchester carry chains

Details Parallel magnitude comparison using manchester carry chains Parallel magnitude comparison using manchester carry chains

1996-10-15

1997-11-18

Wambach, Margaret Rose

Communications: electrical

Digital comparator systems

G06F 702

Patent

active

056892284

ABSTRACT:
Disclosed herein are methods and apparatus for performing magnitude comparisons within a shift-merge unit (SMU). A programmable or partially programmable Manchester carry chain is used to perform each comparison. The Manchester carry chains are programmed using the bits of mask markers and are constructed so as to make a comparison with respect to a given mask condition and position marker which are constants. An implementation in dual rail dynamic CMOS logic avoids the necessity of input inversions, and allows construction of more compact Manchester carry chain circuitry. The size of an SMU will therefore be determined by mask marker routings rather than transistor count. When shorted, opened, and/or redundant transistors, and/or transistors programmed with constants are optimized out of constructed Manchester carry chains, the mask marker bits of a dual rail SMU will have equal fanouts, thereby preventing clock skew. Manchester carry chains may be broken into modular components which may be stepped a number of times to create a 2.sup.N bit SMU. Breaking carry chains into modular components also allows the creation of a single mask, or several smaller masks, within a single SMU. This is an important factor in handling multimedia data which comprises smaller word lengths than instruction data.

REFERENCES:
patent: 5059942 (1991-10-01), Burrows
patent: 5208490 (1993-05-01), Yetter
patent: 5341500 (1994-08-01), Moyer et al.

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