Guided transfers with variable stepping

Details Guided transfers with variable stepping Guided transfers with variable stepping

1994-03-08

1997-07-22

Moore, David K.

39542103, 39542107, 39542102, 395401, G06F 9126, G06F 1200, G06F 934, G06F 1214

Patent

active

056511272

ABSTRACT:
This invention is a manner of control of the addresses of memory accesses. The data processing device of this invention includes a memory, a control circuit, a guide table and an address generating circuit. The control circuit receives a packet transfer request and packet transfer parameters. The packet transfer parameters include a start address, a number of guide table entries and a table pointer. The guide table includes guide table entries, each guide table entry having an address value and dimension values defining a block of addresses. The table pointer initially points to a first guide table entry in the guide table. The address generating circuit forms a set of block of addresses for memory access corresponding to each guide table entry, having a start address from a predetermined combination of the start address and the address value of the guide table entry. The block of addresses are formed from the dimension values. Following the memory accesses, the address generating circuit updates the table pointer to point to a next entry in the guide table. The address generating circuit may optionally form the predetermined combination of starting address and address value of guide table entry by adding the address value to the prior block starting address or by adding the guide table value to the starting address. The memory access may be a memory read from the block of addresses or a memory write to the block of addresses. In the preferred embodiment, memory, a data processor and a data transfer controller performing the above memory accesses is constructed in a single semiconductor chip. The data transfer controller may access external memory in the same manner as on-chip memory.

REFERENCES:
patent: 4639765 (1987-01-01), D'Hont
patent: 4656597 (1987-04-01), Bond et al.
patent: 4665495 (1987-05-01), Thaden
patent: 4718024 (1988-01-01), Guttag et al.
patent: 4769640 (1988-09-01), Sato
patent: 4809201 (1989-02-01), Keklak
patent: 4812988 (1989-03-01), Duthutt et al.
patent: 4920483 (1990-04-01), Pogue et al.
patent: 5077678 (1991-12-01), Guttage et al.
patent: 5142621 (1992-08-01), Guttag et al.
patent: 5162784 (1992-11-01), Guttag et al.
patent: 5165103 (1992-11-01), Takada et al.
patent: 5197140 (1993-03-01), Balmer
patent: 5212777 (1993-05-01), Gove et al.
patent: 5226125 (1993-07-01), Balmer et al.
patent: 5239654 (1993-08-01), Simmons et al.
patent: 5283863 (1994-02-01), Guttag et al.
patent: 5315708 (1994-05-01), Eidler et al.
patent: 5317333 (1994-05-01), Gottag et al.
Microprocessor Report, Slater Michael, "ITT Ships Programmable Video Processor," vo. 5, No. 20, Oct. 30, 1991, pp. 1,6-7,13.
Sanjay Desai, "The Architecture of the LR33020 GraphX Processor: A MIPS-RISC Based X Terminal Controller", Nov. 10, 1992, pp. 205-208.

Affiliated with

Also associated with

Rating

Guided transfers with variable stepping does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Guided transfers with variable stepping, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Guided transfers with variable stepping will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-1566022