Dynamic division system and method for improving testability of

Details Dynamic division system and method for improving testability of Dynamic division system and method for improving testability of

1996-05-07

1997-07-22

Wambach, Margaret Rose

Electrical pulse counters, pulse dividers, or shift registers: c

Systems

Identifying or correcting improper counter operation

H03K 2140

Patent

active

056510403

ABSTRACT:
A method and system for testing a digital counter of mn bits comprises dividing the counter into m segments, each of n bits. For test purposes, the counter then is further divided into first and second m segment groups. Multiplex gates are used between the segments and are controlled by sensing the condition of the most significant bits of the most significant one of the m segments for applying clock pulses to verify specific connections between various bits of the counter for the first four cycles of clock pulses applied during the test mode. After these four cycles, gating circuits coupled with the most significant bits of the most significant one of the m segments are used to automatically switch the remainder of the test connections to the second group to verify all of the remaining connections in the counter, with full testing of the counter being accomplished in 2.sup.n +2 cycles of clock pulses.

REFERENCES:
patent: 4661930 (1987-04-01), Tran
patent: 5402458 (1995-03-01), Moughanni

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