Fishing – trapping – and vermin destroying
Patent
1995-09-05
1997-11-18
Bowers, Jr., Charles L.
Fishing, trapping, and vermin destroying
437 39, 437176, 437912, 148DIG105, 148DIG140, H01L 21338
Patent
active
056887035
ABSTRACT:
A method of manufacturing a gate structure (19) for a semiconductor device (10) utilizes a dielectric layer (17) containing aluminum to protect the surface of a substrate (11) from residues resulting from deposition and etching of the gate structure (19). The gate structure (19) forms a refractory contact to the substrate (11), and the source and drain regions (26) are self-aligned to the gate structure (19). Semiconductor devices manufactured using methods in accordance with the present invention are observed to have a higher breakdown voltage and a higher transconductance, among other improved electrical performance characteristics.
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Klingbeil, Jr. Lawrence S.
Martinez Marino J.
Bowers Jr. Charles L.
Chen George C.
Koch William E.
Motorola Inc.
Thomas Toniae M.
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