Semiconductor read-only VLSI memory

Details Semiconductor read-only VLSI memory Semiconductor read-only VLSI memory

1996-09-06

1997-07-22

Nguyen, Tan T.

Static information storage and retrieval

Addressing

Sync/clocking

36518908, G11C 700

Patent

active

056509790

ABSTRACT:
The performance of a very large scale integrated READ ONLY MEMORY circuit is improved by a number of different improvements in various circuits and methodologies utilized in the memory. One of the improvements relates to control of an output buffer by a control circuit. The output enable signal to the output buffer is selectively inhibited by the control circuit which determines when the memory cycle is actually completed. Only after the memory cycle is actually completed is the conventional chip enable signal, CE, coupled to the enable input in the output buffer.

REFERENCES:
patent: 4858197 (1989-08-01), Aono et al.
patent: 5159573 (1992-10-01), Yamada
patent: 5295117 (1994-03-01), Okada
patent: 5502672 (1996-03-01), Kwon

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