Excavating
Patent
1996-10-02
1997-10-14
Nguyen, Hoa T.
Excavating
371 226, G01R 3128, G06F 1100
Patent
active
056779160
ABSTRACT:
A built-in self test circuit incorporated in a mega-cell of an LSI is used to easily check a signal delay between mega-cells. A semiconductor integrated circuit includes the first mega-cell incorporating a built-in self test circuit and an output buffer, the second mega-cell for receiving output data from the output buffer of the first mega-cell, and a flip-flop circuit for storing a logical value at a node on the output side of the output buffer at the same timing as a timing at which the output data from the output buffer are stored in the second mega-cell.
REFERENCES:
patent: 4615030 (1986-09-01), Kumagai
patent: 4872168 (1989-10-01), Aadsen et al.
patent: 4887267 (1989-12-01), Kanuma
patent: 4980887 (1990-12-01), Dively et al.
IEEE Standard Test Access Port and Boundary-Scan Architecture, chapters 1, 2, 7, and 10, (Std. 1149.1 1990).
Kabushiki Kaisha Toshiba
Nguyen Hoa T.
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