Method and apparatus for efficient self testing of on-chip memor

Details Method and apparatus for efficient self testing of on-chip memor Method and apparatus for efficient self testing of on-chip memor

1996-07-01

1997-10-14

Canney, Vincent P.

Excavating

G06F 1100

Patent

active

056779135

ABSTRACT:
An electronic device and method for utilizing two extra microcode instructions to generate a set of test patterns which provide complete bitwise self-testing of the on-chip memory of a microcode sequencer. The self-testing sequence can be triggered by a single external interface event.

REFERENCES:
patent: 4797808 (1989-01-01), Bellay et al.
patent: 5432797 (1995-07-01), Takano

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