Process for enhancing refresh in dynamic random access memory de

Fishing – trapping – and vermin destroying

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437 40AS, 437 47, 437 60, 437919, H01L 2170, H01L 2700

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active

056503490

ABSTRACT:
A process for enhancing refresh in Dynamic Random Access Memories wherein n-type impurities are implanted into the capacitor buried contact after formation of the access transistor components. The process comprises forming a gate insulating layer on a substrate and a transistor gate electrode on the gate insulating layer. First and second transistor source/drain regions are formed on the substrate adjacent to opposite sides of the gate electrodes. N-type impurities, preferably phosphorous atoms, are then implanted into the first source/drain region which will serve as the capacitor buried contact.

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