Method for forming vias in multilayer circuits

Electric heating – Metal heating – By arc

Patent

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

36447408, B23K 2608

Patent

active

052930254

ABSTRACT:
The invention is directed to a method for rapidly forming a pattern of vias in multilayer electronic circuits in which each of the via holes is formed by drilling with a controlled number of Nd:YAG laser beam pulses. Beam positioning is controlled by means of a programmed galvanometric beam positioner. The drilling sequence is optionally controlled by application of an heuristic algorithm of the symmetric Traveling Salesman Problem.

REFERENCES:
patent: 3742182 (1973-06-01), Saunders
patent: 3770529 (1973-11-01), Anderson
patent: 4152575 (1979-05-01), Banas
patent: 4258468 (1981-03-01), Balde
patent: 4478677 (1984-10-01), Chen et al.
patent: 4799984 (1989-01-01), Rellick
patent: 4806188 (1989-02-01), Rellick
patent: 4857698 (1989-08-01), Perun
patent: 4959119 (1990-09-01), Lantzer
patent: 4964212 (1990-10-01), Deroux-Dauphin et al.
patent: 5006182 (1991-04-01), Gantzhorn, Jr. et al.
patent: 5037183 (1991-08-01), Gagosz et al.
patent: 5063280 (1991-11-01), Inagawa et al.
patent: 5087396 (1992-02-01), Zablothy et al.
patent: 5093548 (1992-03-01), Schmidt-Hebbel
patent: 5155679 (1992-10-01), Jain et al.
patent: 5168454 (1992-12-01), La Plante et al.
patent: 5233157 (1993-08-01), Schreiber et al.
Patent Abstracts of Japan, unexamined applications, M Field, vol. 9, No. 226, Sep. 12, 1985, The Patent Office Japanese Government, p. 27 M 412.
Patent Abstracts of Japan, unexamined applications, E field, vol. 15, No. 191, May 16, 1991, The Patent Office Japanese Government, p. 116 E 1068.
Cocca et al., Laser Drilling of Vias in Dielectric for High Density Multilayer Thick Film Circuits, Solid State Technology, Sep., 1978, pp. 63-66.
Barrett et al., A Method for Scanning Electron Microscope Analysis of Laser Drilled Thick Film Vias, Hybrid Circuits, No. 4, Spring, 1984, pp. 61-63.
Ser. No. PCT/US90/06160, filed Oct. 25, 1990, Kawasaki et al.

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Method for forming vias in multilayer circuits does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Method for forming vias in multilayer circuits, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method for forming vias in multilayer circuits will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-155714

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.