Data processor for processing branch instructions

Details Data processor for processing branch instructions Data processor for processing branch instructions

1994-04-06

1995-09-26

Eng, David Y.

Boots, shoes, and leggings

364938, 3642613, G06T 942

Patent

active

054539277

ABSTRACT:
A data processor capable of efficiently processing jump instructions including an instruction fetch unit for fetching instructions from a memory, an instruction decoding unit for decoding instructions fetched by the instruction fetch unit, an instruction executing unit for executing instructions according to the decoding result of the instructions, a PC calculation unit for holding a head address of an instruction being decoded at the instruction decoding unit, adders for selectively inputting respective values of branch displacement fields transferred from the instruction fetch unit responsive to a part of a value of an instruction code field transferred from the instruction fetch unit so as to add it to the head address of the instruction transferred from the PC calculation unit, and a JA bus for transferring the addition results to the instruction fetch unit.

REFERENCES:
patent: 4399507 (1983-08-01), Cosgrove
patent: 4777594 (1988-10-01), Jones
patent: 5146571 (1992-09-01), Logan
patent: 5226128 (1993-07-01), Rau
patent: 5293624 (1994-03-01), Andrade
patent: 5295248 (1994-03-01), Miyamori
The GMicro/100 32-Bit Microprocessor, IEEE Micro vol. 11, No. 4, pp. 20-23, 62-72, Aug. 1991.

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