Process of fabricating semiconductor integrated circuit device h

Fishing – trapping – and vermin destroying

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437191, 437228, 437229, 15665911, H01L 2144

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active

056772424

ABSTRACT:
A first opening formed in a photo-resist layer is topographically covered with a spacer layer of silicon oxide so as to define a second opening narrower than the first opening, and the spacer layer and a target layer of silicon oxide therebeneath are anisotropically etched so as to form a contact hole narrower than the first opening in the target layer.

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patent: 4801350 (1989-01-01), Mattox et al.
patent: 4857477 (1989-08-01), Kamamori
patent: 5279990 (1994-01-01), Sun et al.
patent: 5334552 (1994-08-01), Homma
patent: 5444021 (1995-08-01), Chung et al.

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