Information processing system

Boots – shoes – and leggings

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364900, G06F 1300

Patent

active

040620590

ABSTRACT:
In an information processing system comprising a central processing unit, an input/output unit and a first-in first-out stack connected between these units there are provided a buffer control circuit for detecting the full and empty states of the first-in first-out stack, an input/output control circuit connected between the first-in first-out stack and the input/output unit for detecting a predetermined state of the input/output unit, a status register for storing specific states of the first-in first-out stack and the input/output unit, a command register controlled by programmed information from the central processing unit for establishing a specific interruption condition corresponding to the specific states of the first-in first-out stack and the input/output unit, and an interruption control circuit coupled to the status register and the command register for applying an interruption signal to the central processing unit when the state signal from the status register and the interruption condition signal from the command register coincide with each other.

REFERENCES:
patent: 3328772 (1967-06-01), Oeters
IBM Tech Disclosure Bulletin, vol. 15, No. 12, May 1973, by N. T. Christensen et al.

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