Next address subprocessor

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G06F 920

Patent

active

040620581

ABSTRACT:
A subprocessor and a method for a digital computer processing a special cs of programs wherein determination of the next processing program instruction address occurs simultaneously with execution of a preceding set of processing program instructions without incurring the delay inherent in performance of the intervening branch conditions.

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patent: 3764988 (1973-10-01), Onishi
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patent: 3900835 (1975-08-01), Bell et al.

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