Peripheral storage system having multiple data transfer rates

Details Peripheral storage system having multiple data transfer rates Peripheral storage system having multiple data transfer rates

1982-09-27

1986-02-18

Heckler, Thomas M.

Boots, shoes, and leggings

G06F 1208

Patent

active

045716749

ABSTRACT:
Fast and slow channels are attached to a cached peripheral storage system, having a front store and a backing store preferably with a plurality of data storage devices. The peripheral data storage device data transfer rate is not greater than the data rate of the fast channels but greater than the data rate of the slow channels. For data associated with a fast channel, data promotion from the backing store to the front store is designed to encourage read hits while discouraging write hits. For the slow channel, all data goes through the front store. Cache bypassing controls are handled through the LRU (least recently used) replacement algorithm for the slow channels. A common demotion of data from the front store to the backing store is used for all channels. Front store occupancy varies in that buffering for slow channels (data rate change) tends to store and keep full tracks, while caching for fast channels limits data occupancy. For a fast channel, a cache miss results in directly accessing the backing store. The data storage devices are preferably disk data storage devices (DASD) or magnetic tape recorders.

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