Fishing – trapping – and vermin destroying
Patent
1992-09-02
1993-12-28
Hearn, Brian E.
Fishing, trapping, and vermin destroying
437 2, 437 5, 437909, 437101, 148DIG1, H01L 21265
Patent
active
052739201
ABSTRACT:
A method of fabricating a thin film transistor (TFT) includes the steps of forming a gate conductor on a substrate; depositing a gate dielectric layer of silicon nitride over the gate conductor; treating the exposed silicon nitride on the surface of the gate dielectric layer with a hydrogen plasma at a power level of at least 44 mW/cm.sup.2 for at least 5 minutes; depositing a layer of amorphous silicon semiconductor material over the gate dielectric layer; depositing a layer of n+ doped silicon over the treated amorphous silicon surface; depositing a layer of source/drain metallization over the n+ doped layer; and patterning the source/drain metallization and portions of the underlying n+ doped layer to form source and drain electrodes. The deposition of the TFT material layers and the hydrogen plasma treatment is preferably by plasma enhanced chemical vapor deposition.
REFERENCES:
patent: 4741964 (1988-05-01), Haller
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Yamaguchi et al., The Effect of Hydrogen Plasma on the Properties of a-Si:H/a-Si.sub.1-x N.sub.x :H Superlattices, 1988, Philosophical Magazine Letters, vol. 58, No. 4, 213-218.
Fenner et al., Silicon Surface Passivation by Hydrogen Termination: A Comparative Study of Preparation Methods, Jul. 1 1989, J. Appl. Phys. 66(1).
Wu et al., Passivation kinetics of Two Types of Defects in Polysilicon TFT by Plasma Hydrogenation, Apr. 1991, IEEE Electron Device Letters, vol. 12, No. 4.
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Veprek et al., Surface Hydrogen Content and Passivation of Silicon Deposited by Plasma Induced Chemical Vapor Deposition from Silane and The Implications for the Reaction Mechanism, Jul./Aug. 1989, J. Vac. Sci. Technol. A7(4).
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Kwasnick Robert F.
Possin George E.
General Electric Company
Hearn Brian E.
Ingraham Donald S.
Nguyen Tuan
Snyder Marvin
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