Method of fabricating a semiconductor memory device

Fishing – trapping – and vermin destroying

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437 48, 437228, 437229, H01L 2170

Patent

active

054058007

ABSTRACT:
A method of fabricating a semiconductor memory device on a semiconductor substrate is disclosed. A gate electrode that becomes a word line, a bit line, and a charge-storage electrode are formed in a memory cell array region of a semiconductor substrate. A capacitor insulator layer and a plate electrode are formed in that order. Then, a BPSG film is formed in the memory cell array region and in the peripheral circuit region. A resist pattern is formed on the BPSG film, leaving the memory cell array region exposed. Using the resist pattern thus formed as a mask, an etching treatment is applied to remove an upper surface portion of the BPSG film lying within the memory cell array region by a given amount. After the resist pattern is removed, the BPSG film is heated in order that it reflows to planarize.

REFERENCES:
patent: 4882289 (1989-11-01), Moriuchi et al.
patent: 5135881 (1992-08-01), Sacki
patent: 5188975 (1993-02-01), Kojima et al.
patent: 5320976 (1994-06-01), Chim et al.

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