Stress sensitive P-N junction devices formed from porous silicon

Details Stress sensitive P-N junction devices formed from porous silicon Stress sensitive P-N junction devices formed from porous silicon

1994-04-29

1995-04-11

Chaudhuri, Olik

Fishing, trapping, and vermin destroying

437901, 437974, H01L 2104

Patent

active

054057868

ABSTRACT:
Stress sensitive P-N junction devices are fabricated by forming a porous layer in a semiconductor of a given conductivity, diffusing dopants of the opposite conductivity into the porous layer and forming a non-porous layer on the porous layer. This results in a microporous structure having a plurality of microcrystalline regions extending therethrough, which enhances the quantum confinement of energetic carriers and results in a device which is highly sensitive to stress.

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Pourous silicon formation mechanism, Journal of Applied Physics, vol. 71, No. 8 R1, R. L. Smith and S. D. and S. D. Collins, pp. R1-R22 (Apr. 1992).

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