Protective circuit for field effect transistor amplifier

Electrical transmission or interconnection systems – Nonlinear reactor systems – Parametrons

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307304, 317 33R, 330 15, 330 17, 330 22, 330 35, 330207P, H02H 904, H02H 720, H03F 316, H03F 3185

Patent

active

039683826

ABSTRACT:
A field effect transistor amplifier comprising one or more depletion-type field effect transistors, preferably with triode characteristics, and having an operating voltage applied across its drain and source electrodes through a load, while an input signal to be amplified is applied to its gate electrode and a predetermined DC gate bias voltage is applied between the gate and source electrodes; is provided with a protective circuit for preventing damage to the field effect transistor by an excessive input signal that is, by over-drive, and which includes a source resistor connected in series with the source electrode and a constant voltage element, for example, constituted by one or more diodes, connected between the gate electrode and the side of the source resistor remote from the respective source electrode. The resistance value of the source resistor and the forward voltage of the diode or constant voltage element are selected so that the maximum drain or source current of each field effect transistor, when operated with an input signal applied to its gate electrode, does not exceed the maximum drain or source current of the field effect transistor in the absence of any gate-source voltage applied thereto. The source resistor of the foregoing protective circuit may further preferably be included in another protective circuit by which the input signal is shunted to the load when the impedance of the latter declines below a predetermined value, for example, in response to a short circuit in the load, so as to prevent overloading of the field effect transistor. Further, a push-pull amplifier employing triode characteristic field effect transistors with the foregoing protective circuits therefor is disclosed with a biasing circuit for stabilizing the biasing DC drain current of the field effect transistors when the operating voltage is subject to fluctuations.

REFERENCES:
patent: 3359503 (1967-12-01), Warner, Jr.
patent: 3435257 (1969-03-01), Lawrie, Jr.
patent: 3441864 (1969-04-01), Hafler
patent: 3469203 (1969-09-01), Poitras
patent: 3508162 (1970-04-01), Eisenberg
patent: 3512100 (1970-05-01), Killion
patent: 3536958 (1970-10-01), Sondermeyer
patent: 3569849 (1971-03-01), Cassidy et al.
patent: 3668545 (1972-06-01), Recklinghausen
patent: 3681659 (1972-08-01), Suzuki
patent: 3801858 (1974-04-01), Grangaard et al.

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