ROM-Based complex multiplier useful for FFT butterfly arithmetic

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364726, G06F 752, G06F 102

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active

043441513

ABSTRACT:
A four-port digital complex multiplier useful for FFT butterfly arithmetic units and in which ROM's are employed as square function look-up tables. Each of the four ports is responsive to a respective one of the component values of two complex numbers. The square-function look-up memories are responsive to various ones of the input ports and cooperate with quarter-square-multipliers to provide component complex products. An output subtractor and an output summer, responsive to mutually exclusive pairs of the quarter-square multipliers, provide a respective real and imaginary component of the product of the two complex numbers.

REFERENCES:
patent: 3588460 (1968-07-01), Smith
patent: 3686490 (1972-08-01), Goldstone
patent: 3746848 (1973-07-01), Clary
patent: 3800130 (1974-03-01), Martinson et al.
patent: 3926367 (1975-12-01), Bond et al.
Tokoro, "Fast Fourier Transform by Hardware", Systems Computers Controls, vol. 6, No. 5, 1975, pp. 58-67, 364/726.
Singh, "Binary Multiplier Circuit Using Read-Only Memory" IBM Tech. Disclosure Bulletin, vol. 14, No. 10, Mar. 1972, pp. 2981-2982, 364/757.
Hemel, "Making Small ROM's Do Math Quickly, Cheaply & Easily" Electronics, May 11, 1970, pp. 104-111, 364/757.
Finn, "LSI Hardware Implements Signal Processing Algorithms" Computer Design, vol. 19, No. 3, Mar. 1980, pp. 137-142, 364/754.

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