Signal delay device

Details Signal delay device Signal delay device

1989-12-08

1991-08-13

Miller, Stanley D.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307592, 307594, 331 2, 331 25, H03K 513

Patent

active

050398938

ABSTRACT:
A signal delay device comprises a CMOS gate circuit having an input terminal to which a binary input signal to be delayed is applied, an output terminal from which a delayed signal is derived and power voltage supply terminals to which operation power voltages are applied. The delay time of the CMOS gate circuit depends upon voltage applied to it and, utilizing this phenomenon, voltage control means is provided in a power supplying path for the CMOS gate circuit for controlling voltage applied to the CMOS gate circuit. The signal delay device using the CMOS gate circuit is applied to a combination of an FM modulator and FM demodulator to provide a delay circuit for an analog circuit.

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