Process for lay-out of a semiconductor integrated circuit

Details Process for lay-out of a semiconductor integrated circuit Process for lay-out of a semiconductor integrated circuit

1992-02-07

1994-03-08

Thomas, Tom

Fishing, trapping, and vermin destroying

437206, 437207, 437219, 364491, H01L 2160

Patent

active

052926877

ABSTRACT:
A pad is provided outside a pad block. The most appropriate position is determined for the pad which is connected to the pad block. The pad block is arranged to be most appropriate in position relative to the pad, and a coordinate of the pad block is determined to be used for interconnection of internal regions of the pad block.

REFERENCES:
patent: 4268848 (1981-05-01), Casey et al.
patent: 4577276 (1986-03-01), Dunlop et al.
patent: 4600995 (1986-07-01), Kinoshita
patent: 4839820 (1989-06-01), Kinoshita et al.
patent: 4852016 (1989-07-01), McGehee
patent: 5079834 (1992-01-01), Itagaki et al.
patent: 5146300 (1992-09-01), Hamamoto

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