Fishing – trapping – and vermin destroying
Patent
1992-12-14
1994-03-08
Quach, T. N.
Fishing, trapping, and vermin destroying
437 41, 437 21, 437979, 148DIG150, H01L 21336
Patent
active
052926753
ABSTRACT:
A method for forming a MOS transistor having LDD structure by a simple and a few number of processes and a structure thereof are described. In accordance with the present invention, a low concentration of an impurity region can be formed in a semiconductor film part between an end of gate electrode and source or drain, by forming an ordinary gate insulating film extending beyond the gate electrode in the direction along the source and drain, in place of a spacer in the side of gate electrode which has been required for a preparation of conventional TFT having LDD structure, and further by forming a thinner insulating film than the gate insulating film in the side thereof, and by utilizing the thickness difference between the gate insulating film part excepting the gate electrode and the thin insulating film in the side thereof.
REFERENCES:
patent: 4319395 (1982-03-01), Lund et al.
patent: 4897361 (1990-01-01), Harriott et al.
patent: 4946799 (1990-08-01), Blake et al.
patent: 4951601 (1990-08-01), Maydan et al.
Quach T. N.
Semiconductor Energy Laboratory Co,. Ltd.
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