Fishing – trapping – and vermin destroying
Patent
1992-07-29
1994-03-08
Hearn, Brian E.
Fishing, trapping, and vermin destroying
437154, 148DIG70, 148DIG157, H01L 21266
Patent
active
052926710
ABSTRACT:
In a method of manufacturing CMOS transistors, a well that is of a second conductivity type is formed in a semiconductor substrate of a first conductivity type and is surrounded by a high concentration buried layer of the first conductivity type which completely extends around and below the well, and which also constitutes wells of the first conductivity type. The high-concentration buried layer is formed by a self-aligned process, and the potential of the buried layer can be easily fixed from the top of the semiconductor substrate so that a high degree of resistance is obtained to CMOS latch-up.
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Chaudhari C.
Hearn Brian E.
Matsushita Electric - Industrial Co., Ltd.
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