Memory address mapping mechanism

Details Memory address mapping mechanism Memory address mapping mechanism

1986-07-24

1989-02-21

Heckler, Thomas M.

Boots, shoes, and leggings

G06F 1208

Patent

active

048071196

ABSTRACT:
A memory address mapping mechanism includes a flip-flop for latching a signal (PROT) representing the real or protective virtual address mode. AN output signal from the flip-flop is supplied to an address decoder. In either the real or protective virtual address mode, the address decoder receives the address signal from a microprocessor and the signal (PROT) from the flip-flop, decodes the address signal so as to obtain a continuous memory address space, and outputs a memory address selection signal.

REFERENCES:
patent: 4057848 (1977-11-01), Hayashi
patent: 4340932 (1982-07-01), Bakula et al.
patent: 4361868 (1982-11-01), Kaplinsky
patent: 4432053 (1984-02-01), Gaither et al.

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