Semiconductor integrated circuit incorporating SITS

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357 13, 357 22, H01L 2968, H01L 2704

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active

048070114

ABSTRACT:
A semiconductor integrated circuit comprising a plurality of vertical static induction transistors (SITs) of normally-off type formed in a common semiconductor substrate in such a manner that the lateral dimension of the channel region of the SITs employed to form a hardware circuit region such as a logic circuit is designed greater than of the SITs which are employed to form a peripheral circuit region. Thus, it is possible to provide a semiconductor integrated circuit which concurrently satisfies a plurality of differently functioning semiconductor circuit requirements to exhibit different electric characteristics as represented by a high-speed operation and a high breakdown voltage.

REFERENCES:
patent: 4198648 (1980-04-01), Nishizawa
patent: 4205334 (1980-05-01), Nonaka et al.
patent: 4216490 (1980-08-01), Ohki
patent: 4434433 (1984-02-01), Nishizawa
Hart et al, "Bioplar LSI Takes a New Direction With Integrated Injection Logic" Electronics, Oct. 3, 1974, pp. 111-118.
Yamaguchi et al, "Optimum Design of Triode-Like JFET's by Two-Dimensional Computer Simulation", IEEE Transactions on Electron Devices, vol. ED-24 No. 8, Aug 1977, pp. 1061-1069.
Baliga, "A Power Junction Gate Field-Effect Transistor Structure With High Blocking Gain", Transactions on Electron Devices, vol. ED-27, No. 2, Feb. 1980 pp. 368-373.
Kondo et al, "A New Bioplar Transistor-GAT", IEEE Transactions on Electron Devices, vol. ED-27, No. 2, Feb. 1980, pp. 373-379.

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