Method of fabricating semiconductor device

Details Method of fabricating semiconductor device Method of fabricating semiconductor device

1991-08-29

1993-04-20

Hearn, Brian E.

Fishing, trapping, and vermin destroying

437162, 437 59, 148DIG9, H01L 21265

Patent

active

052042740

ABSTRACT:
A method of fabricating a semiconductor device includes the steps of forming a base diffusion layer in a predetermined region in a semiconductor substrate of a first conduction type, the base diffusion layer being of a second conduction type; forming first insulating films and simultaneously forming an emitter lead-out electrode and a collector lead-out electrode in regions above an emitter-contact-forming region and a collector-contact-forming region, the first insulating extending films on the emitter and collector lead-out electrodes, the emitter and collector lead-out electrodes including impurity corresponding to the first conduction type; forming second insulating films at sides of the emitter and collector lead-out electrodes; forming a base contact; forming a base lead-out electrode including impurity corresponding to the second conduction type; diffusing the impurity from the emitter lead-out electrode, the collector lead-out electrode, and the base lead-out electrode to form an emitter diffusion layer of the first conduction type, a collector contact diffusion layer of the first conduction type, and a base contact diffusion layer of the second conduction type; locating an end of the emitter diffusion layer and a first end of the base contact diffusion layer at positions directly below a portion of the second insulating films which extends at a side of the emitter lead-out electrode; and locating a second end of the base contact diffusion layer and an end of the collector contact diffusion layer at positions directly below a portion of the second insulating films which extends at a side of the collector lead-out electrode.

REFERENCES:
patent: 4375999 (1983-03-01), Nawata et al.
patent: 4693782 (1987-09-01), Kikuchi
patent: 4891328 (1990-01-01), Gris
patent: 4902640 (1990-02-01), Sachitano et al.
patent: 4908324 (1990-03-01), Nihira
patent: 4978630 (1990-12-01), Kim
1983 National Meeting of the Semiconductor Material Department of the Institute of Electronics and Communication Engineers of Japan, p. 247.
Sakai et al, "Prospects of SST Technology for High Speed LSI", IEDM 85, pp. 18-21.
Sakai et al, "Very High Speed Bipolar LSI Process Technology: SST", Review of the Electrical Communications Laboratories, vol. 35, No. 4, 1987.
Yoshiji Kobayashi et al, "High Speed IC Fabricated by SST4 Process" 1986 National Meeting of the Institute of Electronics and Communication Engineers of Japan.
M. Suzuki et al, "A 165 ps/gate 5000-Gate ECL Gate Array", Extended Abstracts of the 17th Conference on Solid State Devices and Materials, Tokyo 1986, pp. 377-380.

Affiliated with

Also associated with

Rating

Method of fabricating semiconductor device does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Method of fabricating semiconductor device, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method of fabricating semiconductor device will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-1525771