Sample-and-hold circuit

Electrical transmission or interconnection systems – Personnel safety or limit control features – Interlock

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Details

307551, G11C 2702

Patent

active

048067903

ABSTRACT:
For elimination of a driftage of voltage at an output node, there is proposed a sampling-and-hold circuit comprising an n-p-n type charging transistor capable of charging up a hold-capacitor to a certain voltage level in proportion to the voltage level of an input signal, an n-p-n type driving transistor driven by the hold-capacitor for producing an output signal at a signal output node, and a clamping circuit operative to keep the voltage level of the base node of the charging transistor in a predetermined value is so far as the hold-capacitor keeps the certain voltage level, so that the hold-capacitor supplies a base current only to the driving transistor, thereby decreasing the driftage of voltage at the output node.

REFERENCES:
patent: 3413492 (1968-11-01), Schneider
patent: 3643110 (1972-02-01), Thompson
patent: 3659117 (1972-04-01), Caveney et al.
patent: 4559457 (1985-12-01), Sugawara

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