Dual modulus prescaler

Details Dual modulus prescaler Dual modulus prescaler

1997-02-26

1999-01-12

Wambach, Margaret R.

Electrical pulse counters, pulse dividers, or shift registers: c

Systems

Pulse multiplication or division

377 47, 377 52, H03K 2100

Patent

active

058598901

ABSTRACT:
A dual-modulus prescaler (100) has improved performance for high-speed operation. A timing signal is developed from a flip flop circuit (106) two and one-half clock cycles before the last stage of the prescaler is clocked. The timing signal is used to produce a selector signal to gate a multiplexer (112). Because of the early generation of the timing signal, the multiplexer selection process is removed from the critical path. The remaining delay through the multiplexer is minimal to minimize the critical path of the prescaler.

REFERENCES:
patent: 3970941 (1976-07-01), Leuschner
patent: 4516251 (1985-05-01), Gallup
patent: 4953187 (1990-08-01), Herold et al.
patent: 5349622 (1994-09-01), Gorisse
patent: 5714896 (1998-02-01), Nakagawa et al.
patent: 5754615 (1998-05-01), Colavin

Affiliated with

Also associated with

Rating

Dual modulus prescaler does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Dual modulus prescaler, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Dual modulus prescaler will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-1522956