Computer system including address driven program interrupt syste

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G06F 900

Patent

active

047424524

ABSTRACT:
A computer system, such as a microprocessor-based computer system, which includes a program supervisory device for interrupting operations of the central processing unit of the computer system at any designated address, even in a case where the central processing unit has an instruction advance reading function. The interrupt address is stored in a register. A comparator outputs a coincidence signal when the interrupt address coincides with the current address supplied to the system memory. At that time, a multiplexer disposed in the system data bus disconnects the central processing unit from the memory and reconnects it via the system data bus to a register in which there has been prestored an interrupt or other instruction.

REFERENCES:
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patent: 4003033 (1977-01-01), O'Keefe et al.
patent: 4038643 (1977-07-01), Kim
patent: 4099230 (1978-07-01), Mead
patent: 4179731 (1979-12-01), Yamazaki
patent: 4179737 (1979-12-01), Kim
patent: 4245304 (1981-01-01), Porter et al.

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